Cameras - Revision history

PoroCYon: document camera registers

2023-08-09T17:03:39Z

document camera registers

← Older revision		Revision as of 21:03, 9 August 2023
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	[[Image:DSiCameraSampleImage.jpg\|200px\|thumb\|right\|A picture taken with the DSi's camera.]]		[[Image:DSiCameraSampleImage.jpg\|200px\|thumb\|right\|A picture taken with the DSi's camera.]]

			Aptina MT9V113

	* 0.3 Megapixel		* 0.3 Megapixel
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	\| 0x04004200		\| 0x04004200
	\| 2		\| 2
	\| ~~REG_CAMRST~~		\| REG_CAM_MCNT
	\|-		\|-
	\| 0x04004202		\| 0x04004202
	\| 2		\| 2
	\| ~~REG_CAMCNT~~		\| REG_CAM_CNT
	\|-		\|-
	\| 0x04004204		\| 0x04004204
	\| 4		\| 4
	\| ~~REG_CAMDATA~~		\| REG_CAM_DATA
	\|-		\|-
	\| 0x04004210		\| 0x04004210
	\| 4		\| 4
	\| ~~REG_CAM_?~~		\| REG_CAM_SOFS
	\|-		\|-
	\| 0x04004214		\| 0x04004214
	\| 4		\| 4
	\| ~~REG_CAM_?~~		\| REG_CAM_EOFS
	\|}		\|}

	=== ~~REG_CAMRST~~ ===		=== REG_CAM_MCNT ===
	{\| class="wikitable" border="1"		{\| class="wikitable" border="1"
	\|-		\|-
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	! DESCRIPTION		! DESCRIPTION
	\|-		\|-
	\| 15-0		\| 15-8
	\| ?		\| unused
			\|-
			\| 7
			\| INI
			\|-
			\| 6
			\| V28 rail enable
			\|-
			\| 5
			\| VIO (1.8V IO voltage) rail enable
			\|-
			\| 4
			\| V18 (1.8V core voltage) rail enable
			\|-
			\| 3
			\| IRCLK
			\|-
			\| 2
			\| SYNC
			\|-
			\| 1
			\| RST
			\|-
			\| 0
			\| STDBY
	\|}		\|}

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	\|-		\|-
	\| 0-3		\| 0-3
	\| ?		\| NLINES
	\|-		\|-
	\| 4		\| 4
	\| IRQ error flag		\| IRQ FIFO-error flag
	\|-		\|-
	\| 5		\| 5
	\| ~~Resets cameras when set?~~		\| flush
	\|-		\|-
	\| 7-6		\| 7-6
	\| ?		\| ?
	\|-		\|-
	\| 9-8		\| 8-9
	\| ~~Set to 2(bit9 set) during init, cleared to zero on shutdown~~		\| IREQVS
	\|-		\|-
	\| 10		\| 10
	\| Set to 1 during init, 0 on cameras shutdown		\| IREQBE: Set to 1 during init, 0 on cameras shutdown
	\|-		\|-
	\| 11		\| 11
	\| Set to 1 during init, 0 on cameras shutdown		\| IE: Set to 1 during init, 0 on cameras shutdown
	\|-		\|-
	\| 12		\| 12
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	\|-		\|-
	\| 13		\| 13
	\| ~~Set during initialization?~~		\| YUV2RGB
	\|-		\|-
	\| 14		\| 14
	\| ~~Cleared during initialization?~~		\| TRIMEN
	\|-		\|-
	\| 15		\| 15
	\| ~~Enable~~		\| data transfer enable
	\|}		\|}

Pk11: /* Applications/Games compatible */ Add homebrew that use the cameras

2022-12-20T01:15:59Z

Applications/Games compatible: Add homebrew that use the cameras

← Older revision		Revision as of 04:15, 20 December 2022
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	* Castle of Magic (DSiWare)		* Castle of Magic (DSiWare)
	* Photo Dojo (DSiWare)		* Photo Dojo (DSiWare)

			=== Homebrew ===
			* [[dsi-camera]]
			* [[dsidl]]

	== Camera registers (ARM7) ==		== Camera registers (ARM7) ==

Pk11: /* Specifications */ Nothing about the cameras are inherently JPEG, that belongs on the DSi Camera app page

2022-12-20T01:15:21Z

Specifications: Nothing about the cameras are inherently JPEG, that belongs on the DSi Camera app page

← Older revision		Revision as of 04:15, 20 December 2022
Line 10:		Line 10:
	* 640*480 VGA		* 640*480 VGA
	* No zoom and no flash.		* No zoom and no flash.
	* Photos saved in JPG format (saved in [[DCIM/]] folder on the SD/SDHC or in the internal memory)

	== Applications/Games compatible ==		== Applications/Games compatible ==

Pk11: /* REG_CAMDATA */ Add YUV mode info

2022-12-20T01:14:12Z

REG_CAMDATA: Add YUV mode info

@@ Line 124: / Line 124: @@
 === REG_CAMDATA ===
 {| class="wikitable" border="1"
 |-
-!  BIT
-!  DESCRIPTION
+! BIT
 |-
-| 31-0
+| 16-23
-| RGB555 video data converted by internal-cameras DSP
+| Second pixel's luminance (Y)
 |}
-For retrieving camera video data, [[NDMA]] with arm9 startup mode 11(camera) is used with this src register. The NDMA frame transfer is started when the cameras [[Interrupts|IRQ]] was thrown. Supported internal-cameras DSP final resolutions are 256x192 and 640x480, the corresponding frame transfer lengths are 0x18000 and 0x96000.(The 256x192 final resolution is converted by the internal-cameras DSP from the camera resolution)
+For retrieving camera video data, [[NDMA]] with arm9 startup mode 11(camera) is used with this src register. The NDMA frame transfer is started when the cameras [[Interrupts|IRQ]] was thrown. Supported internal-cameras DSP final resolutions are 256x192 and 640x480, the corresponding frame transfer lengths are 0x18000 and 0x96000. (The 256x192 final resolution is converted by the internal-cameras DSP from the camera resolution)
 == See also ==

Frosty126: /* Games */ Added the DSi Exclusive "Foto Showdown"

2022-08-31T16:57:58Z

Games: Added the DSi Exclusive "Foto Showdown"

← Older revision		Revision as of 20:57, 31 August 2022
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	* Classic Word Games		* Classic Word Games
	* Cooking Coach		* Cooking Coach
			* Foto Showdown (DSi Exclusive)
	* Pop SuperStar : Road To Celebrity (DSiWare)		* Pop SuperStar : Road To Celebrity (DSiWare)
	* Real Football 2009 (DSiWare)		* Real Football 2009 (DSiWare)

Nocash: /* Camera registers */

2013-07-16T13:01:39Z

Camera registers

← Older revision		Revision as of 17:01, 16 July 2013
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	* Photo Dojo (DSiWare)		* Photo Dojo (DSiWare)

	== Camera registers ==		== Camera registers (ARM7) ==

	The cameras are controlled and initialized with [[I2C_Bus#Cameras\|I2C]]. The below registers ~~are accessed by the ARM9~~.		The cameras are controlled and initialized with [[I2C_Bus#Cameras\|I2C Bus]] on ARM7 side.

			== Camera registers (ARM9) ==

			The actual data transfers are done on ARM9 side with below registers.

	{\| class="wikitable" border="1"		{\| class="wikitable" border="1"
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	\| 4		\| 4
	\| REG_CAMDATA		\| REG_CAMDATA
			\|-
			\| 0x04004210
			\| 4
			\| REG_CAM_?
			\|-
			\| 0x04004214
			\| 4
			\| REG_CAM_?
	\|}		\|}

Yellows8: removed CEVA DSP info for now since that doesn't seem to be used for cameras, until proven otherwise.

2011-11-04T06:08:39Z

removed CEVA DSP info for now since that doesn't seem to be used for cameras, until proven otherwise.

← Older revision		Revision as of 09:08, 4 November 2011
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	== Camera registers ==		== Camera registers ==

	The cameras are controlled and initialized with [[I2C_Bus#Cameras\|I2C]]. The below registers are accessed by the ~~arm9~~.		The cameras are controlled and initialized with [[I2C_Bus#Cameras\|I2C]]. The below registers are accessed by the ARM9.

	{\| class="wikitable" border="1"		{\| class="wikitable" border="1"
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	\|}		\|}

	Used for resetting cameras~~/DSP~~. Once cameras~~/DSP~~ are reset by poking this register, all three 0x0400420X camera registers ~~return all-~~zero ~~on reads~~. ~~This might mean the DSP fw bin was unloaded?~~		Used for resetting cameras. Once cameras are reset by poking this register, all three 0x0400420X camera registers are set to zero.

	=== REG_CAMCNT ===		=== REG_CAMCNT ===
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	\|-		\|-
	\| 5		\| 5
	\| Resets cameras~~/DSP~~ when set?		\| Resets cameras when set?
	\|-		\|-
	\| 7-6		\| 7-6
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	\|-		\|-
	\| 10		\| 10
	\| Set to 1 during init, 0 on cameras~~/DSP~~ shutdown		\| Set to 1 during init, 0 on cameras shutdown
	\|-		\|-
	\| 11		\| 11
	\| Set to 1 during init, 0 on cameras~~/DSP~~ shutdown		\| Set to 1 during init, 0 on cameras shutdown
	\|-		\|-
	\| 12		\| 12
Line 108:		Line 108:
	\|}		\|}

	When the IRQ error flag is set when the cameras [[Interrupts\|IRQ]] handler is executing, the cameras are shut off.		When the IRQ error flag is set when the cameras [[Interrupts\|IRQ]] handler is executing, the cameras are shut off. The cameras I2C devices are powered off until cameras are initialized via this register.

	=== REG_CAMDATA ===		=== REG_CAMDATA ===
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	\|-		\|-
	\| 31-0		\| 31-0
	\| RGB555 video data converted by DSP		\| RGB555 video data converted by internal-cameras DSP
	\|}		\|}

	For retrieving camera video data, [[NDMA]] with arm9 startup mode 11(camera) is used with this src register. The NDMA frame transfer is started when the cameras [[Interrupts\|IRQ]] was thrown. Supported DSP final resolutions are 256x192 and 640x480, the corresponding frame transfer lengths are 0x18000 and 0x96000.(The 256x192 final resolution is converted by the DSP from the camera resolution)		For retrieving camera video data, [[NDMA]] with arm9 startup mode 11(camera) is used with this src register. The NDMA frame transfer is started when the cameras [[Interrupts\|IRQ]] was thrown. Supported internal-cameras DSP final resolutions are 256x192 and 640x480, the corresponding frame transfer lengths are 0x18000 and 0x96000.(The 256x192 final resolution is converted by the internal-cameras DSP from the camera resolution)

	The DSP is a proprietary CEVA DSP, since this ISA is proprietary fw binaries can't be compiled for it. Thus homebrew can't use cameras unless it's possible to initialize cameras without poking REG_CAMRST,(which seems to unload the proprietary DSP fw bin) which might not be possible.

	== See also ==		== See also ==

Yellows8: /* Camera registers */

2011-08-08T00:25:27Z

Camera registers

← Older revision		Revision as of 04:25, 8 August 2011
Line 66:		Line 66:
	\|}		\|}

	Used for resetting cameras/DSP. Once cameras/DSP are reset by poking this register, ~~REG_CAMDATA and REG_CAMCNT are cleared by hw~~.		Used for resetting cameras/DSP. Once cameras/DSP are reset by poking this register, all three 0x0400420X camera registers return all-zero on reads. This might mean the DSP fw bin was unloaded?

	=== REG_CAMCNT ===		=== REG_CAMCNT ===
Line 122:		Line 122:
	For retrieving camera video data, [[NDMA]] with arm9 startup mode 11(camera) is used with this src register. The NDMA frame transfer is started when the cameras [[Interrupts\|IRQ]] was thrown. Supported DSP final resolutions are 256x192 and 640x480, the corresponding frame transfer lengths are 0x18000 and 0x96000.(The 256x192 final resolution is converted by the DSP from the camera resolution)		For retrieving camera video data, [[NDMA]] with arm9 startup mode 11(camera) is used with this src register. The NDMA frame transfer is started when the cameras [[Interrupts\|IRQ]] was thrown. Supported DSP final resolutions are 256x192 and 640x480, the corresponding frame transfer lengths are 0x18000 and 0x96000.(The 256x192 final resolution is converted by the DSP from the camera resolution)

	The DSP fw binary still seems to be loaded after cameras were used in the exploited title, as reading this register(with cameras reinitialized prior to that) results in changing data rather than fixed data. The DSP is a proprietary CEVA DSP, since this ISA is proprietary fw binaries can't be compiled for it. Thus homebrew ~~could potentially only use cameras when the exploited title~~ can use cameras ~~and~~ cameras ~~were used in~~ the ~~title prior to running hax~~.		The DSP is a proprietary CEVA DSP, since this ISA is proprietary fw binaries can't be compiled for it. Thus homebrew can't use cameras unless it's possible to initialize cameras without poking REG_CAMRST,(which seems to unload the proprietary DSP fw bin) which might not be possible.

	== See also ==		== See also ==

Yellows8: /* Camera registers */

2011-08-07T23:45:18Z

Camera registers

← Older revision		Revision as of 03:45, 8 August 2011
Line 66:		Line 66:
	\|}		\|}

	Used for resetting cameras/DSP.		Used for resetting cameras/DSP. Once cameras/DSP are reset by poking this register, REG_CAMDATA and REG_CAMCNT are cleared by hw.

	=== REG_CAMCNT ===		=== REG_CAMCNT ===

Yellows8: /* Camera registers */

2011-08-07T20:25:11Z

Camera registers

← Older revision		Revision as of 00:25, 8 August 2011
Line 78:		Line 78:
	\|-		\|-
	\| 4		\| 4
	\| ?		\| IRQ error flag
	\|-		\|-
	\| 5		\| 5
Line 107:		Line 107:
	\| Enable		\| Enable
	\|}		\|}

			When the IRQ error flag is set when the cameras [[Interrupts\|IRQ]] handler is executing, the cameras are shut off.

	=== REG_CAMDATA ===		=== REG_CAMDATA ===
Line 118:		Line 120:
	\|}		\|}

	For retrieving camera video data, [[NDMA]] with arm9 startup mode 11(camera) is used with this src register. ~~Transfer~~ lengths ~~used~~ are 0x18000 and 0x96000. The ~~former is~~ 256x192~~(actual camera resolution to~~ final ~~video data~~ resolution ~~conversion~~ is ~~handled~~ by DSP) ~~and the latter is 640x480.~~		For retrieving camera video data, [[NDMA]] with arm9 startup mode 11(camera) is used with this src register. The NDMA frame transfer is started when the cameras [[Interrupts\|IRQ]] was thrown. Supported DSP final resolutions are 256x192 and 640x480, the corresponding frame transfer lengths are 0x18000 and 0x96000.(The 256x192 final resolution is converted by the DSP from the camera resolution)

	The DSP fw binary still seems to be loaded after cameras were used in the exploited title, as reading this register(with cameras reinitialized prior to that) results in changing data rather than fixed data. The DSP is a proprietary CEVA DSP, since this ISA is proprietary fw binaries can't be compiled for it. Thus homebrew could potentially only use cameras when the exploited title can use cameras and cameras were used in the title prior to running hax.		The DSP fw binary still seems to be loaded after cameras were used in the exploited title, as reading this register(with cameras reinitialized prior to that) results in changing data rather than fixed data. The DSP is a proprietary CEVA DSP, since this ISA is proprietary fw binaries can't be compiled for it. Thus homebrew could potentially only use cameras when the exploited title can use cameras and cameras were used in the title prior to running hax.